1/*
2 * Generic I2C ops
3 *
4 * Copyright (C) 2019 - 2020 Andy Green <andy@warmcat.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 *
24 * This is like an abstract class for spi, a real implementation provides
25 * functions for the ops that use the underlying OS arrangements.
26 *
27 * It uses descriptor / queuing semantics but eg the GPIO BB implementantion is
28 * synchronous.
29 */
30
31#if !defined(__LWS_SPI_H__)
32#define __LWS_SPI_H__
33
34#include <stdint.h>
35#include <stddef.h>
36
37typedef int (*lws_spi_cb_t)(void *opaque);
38
39enum {
40 LWSSPIMODE_CPOL = (1 << 0),
41 LWSSPIMODE_CPHA = (1 << 1),
42
43 LWS_SPI_BUSMODE_CLK_IDLE_LOW_SAMP_RISING = 0,
44 LWS_SPI_BUSMODE_CLK_IDLE_HIGH_SAMP_RISING = LWSSPIMODE_CPOL,
45 LWS_SPI_BUSMODE_CLK_IDLE_LOW_SAMP_FALLING = LWSSPIMODE_CPHA,
46 LWS_SPI_BUSMODE_CLK_IDLE_HIGH_SAMP_FALLING = LWSSPIMODE_CPHA |
47 LWSSPIMODE_CPOL,
48
49 LWS_SPI_TXN_HALF_DUPLEX_DISCRETE = 0,
50 /**< separate MISO and MOSI, but only either MISO or MOSI has data at
51 * one time... i2c style in SPI */
52
53 LWS_SPI_FLAG_DATA_CONTINUE = (1 << 0),
54 /**< leave without finalizing the SPI transaction */
55 LWS_SPI_FLAG_DC_CMD_IS_HIGH = (1 << 1),
56 /**< It's normally 0 for cmd phase, invert with this flag */
57 LWS_SPI_FLAG_DMA_BOUNCE_NOT_NEEDED = (1 << 2),
58 /**< It's normally 0 for cmd phase, invert with this flag */
59};
60
61typedef struct lws_spi_desc {
62 const uint8_t *src;
63 const uint8_t *data;
64 uint8_t *dest;
65 void *opaque;
66 lws_spi_cb_t completion_cb;
67 uint16_t count_cmd;
68 uint16_t count_write;
69 uint16_t count_read;
70 uint8_t txn_type;
71 uint8_t channel;
72
73 uint8_t flags;
74} lws_spi_desc_t;
75
76typedef struct lws_spi_ops {
77 int (*init)(const struct lws_spi_ops *ctx);
78 int (*queue)(const struct lws_spi_ops *ctx, const lws_spi_desc_t *desc);
79 void * (*alloc_dma)(const struct lws_spi_ops *ctx, size_t size);
80 void (*free_dma)(const struct lws_spi_ops *ctx, void **p);
81 int (*in_flight)(const struct lws_spi_ops *ctx);
82 uint32_t spi_clk_hz;
83 uint8_t bus_mode;
84} lws_spi_ops_t;
85
86LWS_VISIBLE LWS_EXTERN int
87lws_spi_table_issue(const lws_spi_ops_t *spi_ops, uint32_t flags, const uint8_t *p, size_t len);
88
89LWS_VISIBLE LWS_EXTERN int
90lws_spi_readback(const lws_spi_ops_t *spi_ops, uint32_t flags,
91 const uint8_t *p, size_t len, uint8_t *rb, size_t rb_len);
92
93#endif
94